Abstract: A 10-b self-timed SAR A/D converter is designed in 28-nm FDSOI CMOS to convert at 500 MS/s. It maintains this effective number of bits across an input bandwidth of 2 GHz, because it will be ...
Abstract: This paper presents the design of a megawatts (MW) level modular multilevel converter (MMC) phase-leg for 13.8 kV medium voltage (MV) grid based on Wolfspeed 10 kV SiC MOSFET XHV-9 half ...
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